Added initial code from old counter with changes to event system

This commit is contained in:
nedko 2022-10-25 15:59:15 +03:00
parent 55bff207f2
commit 625c10081e
5 changed files with 1256 additions and 0 deletions

18
TODO Normal file
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--- main.c ---
fix everything from main() onward with exception of do_sleep()
--- Menu ---
Attach - Attempt to attach spool
Detach - Attempt to detach spool
Adjust - Adjust Spool Value
Battery - Print Battery Info - Voltage, mAh
--- UI ---
123456mm A<B
123456mm A>B
_
XXXXXXXX | |
XXXXXXXX | |
XXXXXXXX |_|
Battery Should be 2px segments per 5%

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code/Makefile Normal file
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all:
make build
make program
build:
avr-gcc main.c i2c_master.c -o counter -mmcu=attiny84 -Wall -Wextra
program:
avrdude -p attiny84 -c usbtiny -U flash:w:counter

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code/i2c_master.c Normal file
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#include "i2c_master.h"
#include <avr/io.h>
uint8_t i2c_clock(uint8_t type);
void i2c_init(void)
{
// Define SCL and SDA as Output
DDRA |= (1 << 4) | (1 << 6);
// Preload dataregister with "released level" data
USIDR = 0xFF;
// Use SCL and SDA pins
// Select clock sources
USICR = (1 << USIWM1) | (1 << USICS1) | (1 << USICLK);
// Clear flags and reset counter
USISR = (1 << USISIF) | (1 << USIOIF) | (1 << USIPF) | (1 << USIDC);
}
uint8_t i2c_start(uint8_t address)
{
// FOR REPEATED START
// Release SCL
PORTA |= (1 << 4);
// Verify that SCL becomes high
while (!( PINA & (1 << 4) ));
// GENERATE START CONDITION
// Force SDA LOW
PORTA &= ~(1 << 6);
// Pull SCL LOW
PORTA &= ~(1 << 4);
// Release SDA
PORTA |= (1 << 6);
return i2c_write(address);
}
uint8_t i2c_write(uint8_t data)
{
// Pull SCL LOW
PORTA &= ~(1 << 4);
// Setup data
USIDR = data;
// Send 8 bits on bus
i2c_clock(8);
// Enable SDA as input
DDRA &= ~(1 << 6);
// Receive 1 bit on bus & Check for NACK
if (i2c_clock(1) & (1 << 0))
{
return 1;
}
return 0;
}
uint8_t i2c_read(uint8_t nack)
{
// Enable SDA as input.
DDRA &= ~(1 << 6);
// Read 8 bits
uint8_t result = i2c_clock(8);
if (nack)
{
// Load NACK
USIDR = 0xFF;
}
else
{
// Load ACK
USIDR = 0x00;
}
i2c_clock(1);
return result;
}
void i2c_stop(void)
{
// Pull SDA low
PORTA &= ~(1 << 6);
// Release SCL
PORTA |= (1 << 4);
// Wait for SCL to go high
while (!( PINA & (1 << 4) ));
// Release SDA
PORTA |= (1 << 6);
}
uint8_t i2c_clock(uint8_t count)
{
uint8_t reg_temp = (1 << USISIF) | (1 << USIOIF) | (1 << USIPF) | (1 << USIDC);
// Counter counts number of edges
// Overflow signals end of transmission
reg_temp |= 16 - (count * 2);
USISR = reg_temp;
// Set clock source & toggle clock prepare
reg_temp = (1 << USIWM1) | (1 << USICS1) | (1 << USICLK) | (1 << USITC);
do
{
// Generate positve SCL edge.
USICR = reg_temp;
// Wait for SCL to go high
while (!( PINA & (1 << 4)));
// Generate negative SCL edge
USICR = reg_temp;
}
// Wait for counter overflow (all edges are completed)
while (!( USISR & (1 << USIOIF)));
// Read data
reg_temp = USIDR;
// Load dataregister with "released level" data
USIDR = 0xFF;
// Enable SDA as output
DDRA |= (1 << 6);
return reg_temp;
}

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code/i2c_master.h Normal file
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#include <stdint.h>
#ifndef I2C_MASTER_H
#define I2C_MASTER_H
#define I2C_READ 0x01
#define I2C_WRITE 0x00
void i2c_init(void);
uint8_t i2c_start(uint8_t address);
uint8_t i2c_write(uint8_t data);
uint8_t i2c_read(uint8_t nack);
void i2c_stop(void);
#endif // I2C_MASTER_H

1084
code/main.c Normal file

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